Benchmark circuits for clock scheduling and synthesis

10.4231/R7KH0K8Q

Cheng-Kok Koh , Rickard F Ewetz

01/08/2015

This repository contains experimental data related to our ASP-DAC 2015 and ISPD 2015 publications.

benchmark testing clock synthesis clock trees clocks Complexity Theory design aids dynamic scheduling Electrical and Computer Engineering fast clock skew scheduling integrated circuits multi-corner multi-mode optimization skew time measurement timing VLSI