Benchmark circuits for clock scheduling and synthesis

10.4231/R7Q23X5D

Cheng-Kok Koh , Rickard F. Ewetz , Shankarshana Janarthanan

03/26/2015

This repository contains experimental data related to our ASP-DAC 2015, ISPD 2015, and DAC2015 publications.

benchmark testing clock synthesis clock trees clocks Complexity Theory design aids dynamic scheduling Electrical and Computer Engineering fast clock skew scheduling integrated circuits multi-corner multi-mode optimization skew time measurement timing VLSI